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8XC196NT USER'S MANUAL
and PTS, 8-6
block diagram, 8-1
configuring port pins, 8-9
enabling interrupts, 8-13
handshaking, 8-6, 8-7
configuring, 8-6
flow diagram, 8-7
modes, 8-3–8-6
overview, 8-1
programming considerations, 8-13
programming example, 8-15
SFRs, 8-2
signals, 8-2
timing diagrams, 8-6
SSIO0_BUF, C-68
SSIO0_CON, C-68
SSIO1_BUF, C-68
SSIO1_CON, C-68
SSIO_BAUD, C-68
ST instruction, A-2, A-41, A-50, A-55, A-62
Stack instructions, A-54, A-61
Stack pointer, 4-13
and subroutine call, 4-13
initializing, 4-14
State time, defined, 2-7
STB instruction, A-2, A-41, A-50, A-55, A-62
Sticky bit (ST) flag, 3-5, A-4, A-5, A-25, A-26
SUB instruction, A-3, A-41, A-47, A-52, A-59
SUBB instruction, A-3, A-42, A-47, A-48, A-52,
A-59
SUBC instruction, A-3, A-42, A-49, A-52, A-59
SUBCB instruction, A-3, A-42, A-49, A-52, A-59
Subroutines
linking, 3-13
nested, 4-14
Synchronous serial I/O port‚ See SSIO port
T
T1CLK, 7-2, 10-3, B-12
T1CONTROL, 10-5, C-68
T1DIR, 10-3, B-12
T2CLK, 10-3, B-12
T2CONTROL, 10-5, C-68
T2DIR, 10-3, B-12
Technical support, 1-11
Terminology, 1-3
TIJMP instruction, A-2, A-43, A-50, A-56, A-63
Index-14
and EPAx interrupt, 10-29, 10-31
Timer, watchdog‚ See watchdog timer
Timer/counters, 2-9, 10-6, 10-7
and PWM, 10-14, 10-15, 10-16
cascading, 10-7
configuring pins, 10-2
count rate, 10-7
resolution, 10-7
SFRs, 10-3
See also EPA
TIMER1, 10-5, C-68
TIMER2, 10-5, C-68
Timing
BUSWIDTH, 14-12
dump-word routine, 15-24
HLDA#, 14-19
HOLD#, 14-19
instruction execution, A-59–A-60
internal, 2-6, 2-7
interrupt latency, 5-7–5-10, 5-24
program-word routine, 15-22
PTS cycles, 5-10
READY, 14-18
selectable bus-timing
See bus-timing modes
SIO port mode 0, 7-5
SIO port mode 1, 7-6
SIO port mode 2, 7-7
SIO port mode 3, 7-7
slave port, 9-10, 9-13
slave programming routines, 15-22, 15-24
write-strobe mode, 14-27
Training, 1-11
TRAP instruction, 5-6, A-2, A-44, A-51, A-56,
A-63, A-64
TRAP interrupt, 5-4
TXD, 7-2, 15-11, B-12
and SIO port mode 0, 7-4
U
UART, 2-8, 7-1
Unimplemented opcode interrupt, 3-14, 5-4, 5-6,
5-8
Units of measure, defined, 1-5
Universal asynchronous receiver and transmitter‚
See UART
UPROM, 15-6
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