Table of Contents
Advertisement
Multiplexed
Port Pins
With
P6.3
T1DIR
P6.4
SC0
P6.5
SD0
P6.6
SC1
P6.7
SD1
EA#
—
NMI
—
RESET#
—
V
—
PP
XTAL1
—
XTAL2
—
NOTES:
1.
If P5_MODE. x = 0, port is as programmed.
If P5_MODE. x = 1 and HLDA# = 1, P5.0 and P5.1 are LoZ0; P5.5 is LoZ1.
If P5_MODE. x = 1 and HLDA# = 0, port is HiZ.
2.
If P5_MODE. x = 0, port is as programmed. If P5_MODE. x = 1, port is HiZ.
If P x _MODE. x = 0, port is as programmed.
3.
If P x _MODE. x = 1, pin is as specified by P x _DIR and the associated peripheral.
4.
If P2_MODE.7 = 0, pin is as programmed. If P2_MODE.7 = 1, pin is LoZ0.
5.
If XTAL1 = 0, pin is LoZ1. If XTAL1 = 1, pin is LoZ0.
6.
If EA# = 0, port is HiZ. If EA# = 1, port is open-drain I/O (ODIO).
7.
Pins configured as address are high-impedance; pins configured as I/O remain unchanged.
Table B-6. 8XC196NT Pin Status (Continued)
Status During
Reset
WK1
WK1
WK1
WK1
WK1
HiZ
HiZ
WK1
HiZ
Osc input, HiZ
Osc output, LoZ0/1
SIGNAL DESCRIPTIONS
Status During
Idle
(Note 3)
(Note 3)
(Note 3)
(Note 3)
(Note 3)
HiZ
HiZ
WK1
LoZ1
Osc input, HiZ
Osc output, LoZ0/1
Status During
Powerdown
(Note 3)
(Note 3)
(Note 3)
(Note 3)
(Note 3)
HiZ
HiZ
WK1
LoZ1
Osc input, HiZ
(Note 5)
B-15
Advertisement
Table of Contents
