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6.5.1.5
Input Mode
Input mode is obtained by configuring the pin as an open-drain output (EP_DIR set and
EP_MODE clear) and writing a one to EP_REG.x. In this configuration, Q1 and Q2 are both off,
allowing an external device to drive the pin. To determine the value of the I/O pin, read EP_PIN.x.
Table 6-16 is a logic table for I/O operation and Table 6-17 is a logic table for address mode op-
eration of EPORT.
Configuration
EP_MODE
EP_DIR
EP_REG
Address Bit
Q1
Q2
EP_PIN
NOTES:
1.
X = Don't care.
2.
If EP_REG is clear, Q2 is on; if EP_REG is set, Q2 is off.
Table 6-17. Logic Table for EPORT in Address Mode
Configuration
EP_MODE
EP_DIR
EP_REG
Address Bit
EP_PIN
NOTES:
1.
X = Don't care.
2.
EP_REG is output on EPORT during any nonextended external memory access.
Table 6-16. Logic Table for EPORT in I/O Mode
Complementary Output
0
0
0
X
off
on
on
off
0
Q1
Q2
Open-drain
Output
0
0
0
0, 1 (Note 2)
1
0
X
X
off
on
1
0
Complementary Output (Note 1)
1
X
X (Note 2)
0
off
on
0
I/O PORTS
Input
0
1
1
X
off
off
high-impedance
1
X
X (Note 2)
1
on
off
1
6-23
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