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Name
Type
WR#
O
WRH#
O
WRL#
O
XTAL1
I
XTAL2
O
Table B-4. Signal Descriptions (Continued)
Write
The chip configuration register 0 (CCR0) determines whether this pin functions
as WR# or WRL#. CCR0.2=1 selects WR#; CCR0.2=0 selects WRL#.
This active-low output indicates that an external write is occurring. This signal is
asserted only during external memory writes.
WR# is multiplexed with P5.2, SLPWR#, and WRL#.
Write High
The chip configuration register 0 (CCR0) determines whether this pin functions
as BHE# or WRH#. CCR0.2=1 selects BHE#; CCR0.2=0 selects WRH#.
During 16-bit bus cycles, this active-low output signal is asserted for high-byte
writes and word writes to external memory. During 8-bit bus cycles, WRH# is
asserted for all write operations.
WRH# is multiplexed with P5.5 and BHE#.
Write Low
The chip configuration register 0 (CCR0) determines whether this pin functions
as WR# or WRL#. CCR0.2=1 selects WR#; CCR0.2=0 selects WRL#.
During 16-bit bus cycles, this active-low output signal is asserted for low-byte
writes and word writes. During 8-bit bus cycles, WRL# is asserted for all write
operations.
WRL# is multiplexed with P5.2, SLPWR#, and WR#.
Input Crystal/Resonator or External Clock Input
Input to the on-chip oscillator and the internal clock generators. The internal
clock generators provide the peripheral clocks, CPU clock, and CLKOUT
signal. When using an external clock source instead of the on-chip oscillator,
connect the clock input to XTAL1. The external clock signal must meet the V
specification for XTAL1 (see datasheet).
Inverted Output for the Crystal/Resonator
Output of the on-chip oscillator inverter. Leave XTAL2 floating when the design
uses a external clock source instead of the on-chip oscillator.
SIGNAL DESCRIPTIONS
Description
IH
B-13
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