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8XC196NT USER'S MANUAL
Table 15-4. UPROM Programming Values and Locations for Slave Mode
To set this bit
DEI
DED
†
OFD
†
Intel manufacturing uses location FF2016H to determine whether to program the OFD bit. Customers with
QROM or MROM codes who desire the OFD feature should equate location FF2016H to the value 0CDEH.
15.4 PROGRAMMING PULSE WIDTH
The programming pulse width is controlled in different ways depending on the programming
mode. In all cases, the pulse width must be at least 100 µs for successful programming. In slave
programming mode, the pulse width is controlled by the PALE# signal. In auto programming
mode, it is loaded from the external EPROM into the PPW register. In serial port programming
mode, it is loaded from the test ROM into the SP_PPW register. In run-time programming mode,
your software controls the pulse width.
The PPW and SP_PPW registers (Figure 15-2) are identical except for their locations and default
values. Both are word registers and both require that the most-significant bit always be set; the
remaining bits constitute the PPW_VALUE. To determine the correct PPW_VALUE for the fre-
quency of the device, use the following formula and round the result to the next higher integer.
F
------------------------------- - 1
PPW_VALUE
=
where:
PPW_VALUE
F
OSC
Time
The following two examples calculate the PPW_VALUE for a 100-µs pulse width with an 8-MHz
and a 16-MHz crystal, respectively.
8
------------------ - 1
PPW_VALUE
=
16
----------------------
PPW_VALUE
=
15-8
Write this value
×
Time
osc
–
144
is a 15-bit word
is the input frequency on XTAL1, in MHz
is the duration of the programming pulse, in µs
×
100
800
--------- - 1
–
=
–
=
4.5552
144
144
×
100
1600
------------ - 1
–
1
=
–
=
144
144
08H
04H
01H
≈
5
=
05H
≈
10.11
11
=
0BH
To this location
0718H
0758H
0778H
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