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and external address, 14-1
block diagram, 6-20
complementary output mode, 6-21
configuration register settings, 6-24
configuring pins, 6-24
for extended-address, 6-24
for I/O, 6-24
considerations, 6-25, 6-26
idle, powerdown, reset status, B-14
input buffers, 6-26
input mode, 6-23
logic tables, 6-23
open-drain output mode, 6-21
operation, 6-19
output enable, 6-21
overview, 6-1
pins, 6-18
reset, 6-21
SFRs, 6-18
structure, 6-22
EPORT.0–EPORT.3, 6-18, B-7
idle, powerdown, reset status, B-14
EPTS instruction, 5-11, A-3, A-18, A-51, A-58,
A-66
ESD protection, 6-2, 6-6, 6-15, 6-21, 12-5
EST instruction, 3-6, A-3, A-19, A-46, A-55, A-62
ESTB instruction, 3-6, A-3, A-19, A-46, A-55,
A-62
Event, 10-1
Event processor array‚ See EPA
EXT instruction, A-2, A-19, A-46, A-52, A-59
EXTB instruction, A-2, A-20, A-46, A-52, A-59
Extended address lines, 4-1
Extended addressing, 2-1, 2-3, 2-8, 3-11, 4-1, 4-24
code execution, 3-5
instructions, 3-5, 3-6, 4-25
port‚ See EPORT
program counter, 2-5
External memory, 4-2
fetching code, 4-26
EXTINT, 5-3, 13-1, 13-6, B-7
and powerdown mode, 13-4, 13-5, 13-6
hardware considerations, 13-7
F
FaxBack service, 1-8
FE opcode
and inhibiting interrupts, 5-8
Floating point library, 3-5
Formulas
A/D conversion result, 11-9, 11-14
A/D conversion time, 11-7
A/D error, 11-12
A/D sample time, 11-7
A/D series resistance, 11-11
A/D threshold voltage, 11-6
A/D voltage drop, 11-12
capacitor size (powerdown circuit), 13-8
programming pulse width, OTPROM, 15-8,
15-33
programming voltage, 15-15
PWM duty cycle, 5-32
PWM frequency, 5-32
SIO baud rate, 7-10, C-54
SSIO baud rate, 8-10
FPAL-96, 3-5
Frequency
external crystal, 15-31
SSIO port baud-rate generator, 8-9
G
GO command, RISM, 15-34
H
Handbooks, ordering, 1-6
Hardware
A/D converter considerations, 11-11–11-14
addressing modes, 3-6
auto programming circuit, 15-26
clock sources, 12-5
device considerations, 12-1–12-12
device reset, 12-8, 12-10, 12-11, 12-12
interrupt processor, 2-5, 5-1
memory protection, 15-7, 15-17
minimum configuration, 12-1
NMI considerations, 5-6
noise protection, 12-4
oscillator failure detection, 15-7
pin reset status, B-14
programming mode requirements, 15-13
reset instruction, 3-14
serial port programming circuit, 15-32
SIO port considerations, 7-6
slave port connections, 9-6–9-7
INDEX
Index-5
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