Intel 8XC196NT User Manual page 343

8XC196NT USER'S MANUAL
ALE
WR# or RD#
BHE#
AD15:0
Addr
A19:16 Extended Address
When the device is configured to use a 16-bit bus, separate low- and high-byte write signals must
be generated for single-byte writes. Figure 14-11 shows a sample circuit that combines BHE# and
AD0 to produce these signals (WRL# and WRH#). A similar pair of signals for read is unneces-
sary. For a single-byte read with the 16-bit bus, both bytes are placed on the data bus and the pro-
cessor discards the unwanted byte.
14-24
Valid
Data Out
16-bit Bus Cycle
Figure 14-10. Standard Bus Control
BHE#
WR#
Figure 14-11. Decoding WRL# and WRH#
ALE
WR# or RD#
AD7:0
Addr Low
AD15:8 Address High
A19:16 Extended Address
8-bit Bus Cycle
AD0
Data Out
A0284-02
WRH#
WRL#
A3109-01