Intel 8XC196NT User Manual page 593

8XC196NT USER'S MANUAL
and bus-hold protocol, 14-23
and CCB fetches, 4-8
and operating mode selection, 4-24
circuit diagram, 12-11
status
CLKOUT/P2.7, 6-6, 6-12
I/O and control pins, B-14
with illegal IDLPD operand, 12-12
with RESET# pin, 12-10
with RST instruction, 12-9, 12-12
with watchdog timer, 12-12
RESET#, 12-1, 13-2, B-11
and CCB fetch, 12-8
and CLKOUT, 12-9
and device reset, 12-8, 12-9, 12-10, 14-23
and ONCE mode, 13-9
and powerdown mode, 13-6
and programming modes, 15-13, 15-14
idle, powerdown, reset status, B-15
Resonator, ceramic, 12-7
RET instruction, A-2, A-34, A-51, A-56, A-63,
A-64
RISM, 15-33, 15-34
defaults, 15-33, 15-34
examples
beginning execution, 15-41
loading program into RAM, 15-39
programming the PPW, 15-37
reading the OTPROM, 15-38
setting the PC, 15-41
writing to OTPROM, 15-42
ROM, internal, 4-2, 4-23, 4-26, 4-27, 4-28
remapping, 4-23
ROM-dump mode, 15-30
security key verification, 15-30
RS-232C interface, 15-31
RST instruction, 3-14, 12-9, 12-12, A-3, A-35,
A-51, A-58, A-66
Run-time programming, 15-43–15-44
code example, 15-44
RXD, 7-2, 15-12, B-11
and SIO port mode 0, 7-4
and SIO port modes 1, 2, and 3, 7-5
S
Sampled input, 14-11, B-4
SBUF_RX, C-68
Index-12
SBUF_TX, C-68
SC0, 8-5, B-11
configuring for handshaking, 8-6
SC1, 8-5, B-11
configuring for handshaking, 8-6
SCALL instruction, A-3, A-35, A-46, A-52, A-56,
A-63, A-64
SD0, 8-5, B-11
SD1, 8-5, B-11
Security key
and serial port programming mode, 15-31
verification, 15-30
Serial I/O port‚ See SIO port
Serial port programming mode, 15-31–15-42
circuit, 15-32
defaults, 15-33, 15-34
functions, 15-31
memory map, 15-33
operation, 15-34
RISM code examples, 15-37
using internal RAM, 15-34
V voltage, 15-31
PP
See also RISM
SETC instruction, A-3, A-35, A-51, A-58, A-66
SFRs
and powerdown mode, 13-3, 13-4
CPU, 4-14
peripheral, 4-8, 4-9
and windows, 4-15
windowed direct addresses, C-66
reserved, 3-12, 4-8, 4-15
with indirect or indexed operations, 3-12, 4-8,
4-15
Shift instructions, A-58, A-65
SHL instruction, A-3, A-36, A-46, A-58, A-65
SHLB instruction, A-3, A-36, A-46, A-58, A-65
SHLL instruction, A-3, A-37, A-46, A-58
SHORT-INTEGER, defined, 3-2
SHR instruction, A-3, A-37, A-46, A-58, A-65
SHRA instruction, A-3, A-38, A-46, A-58, A-65
SHRAB instruction, A-3, A-38, A-46, A-58, A-65
SHRAL instruction, A-3, A-39, A-46, A-58, A-65
SHRB instruction, A-3, A-39, A-46, A-58, A-65
SHRL instruction, A-3, A-40, A-46, A-58, A-65
Signals
descriptions, B-4–B-13
naming conventions, 1-4
Single transfer mode‚ See PTS