Intel 8XC196NT User Manual page 39

8XC196NT USER'S MANUAL
Although the device has a 24-bit internal address bus, only 20 address lines are implemented.
Therefore, this device can physically address only 1 Mbyte of memory. (See Chapter 4, "Memory
Partitions," and Chapter 6, "I/O Ports," for additional information.)
I/O
Register File
Register
CPU SFRs
2-2
Optional
Core
Clock and
Code/Data
Power Mgmt.
SIO SSIO
Figure 2-1. 8XC196NT Block Diagram
CPU
RALU
Microcode
Engine
ALU
RAM
Master PC
PSW
Registers
Figure 2-2. Block Diagram of the Core
Interrupt
ROM
Controller
PTS
RAM
EPA A/D WDT
Memory Controller
Prefetch Queue
Slave PC
Address Register
Data Register
Bus Controller
Slave
Port
A2800-01
A2797-01