Intel 8XC196NT User Manual page 542

PTSSRV
The PTS service (PTSSRV) register is used by the hardware to indicate that the final PTS interrupt
has been serviced by the PTS routine. When PTSCOUNT reaches zero, hardware clears the corre-
sponding PTSSEL bit and sets the PTSSRV bit, which requests the end-of-PTS interrupt. When the
end-of-PTS interrupt is called, hardware clears the PTSSRV bit. The PTSSEL bit must be set
manually to re-enable the PTS channel.
15
— EXTINT
7
IBF OBE
Bit
Number
15, 13 Reserved. This bit is undefined.
14, 12:0 A bit is set by hardware to request an end-of-PTS interrupt for the corresponding interrupt
through its standard interrupt vector.
The standard interrupt vector locations are as follows.
Bit Mnemonic Interrupt
EXTINT
RI
TI
SSIO1
SSIO0
CBF
IBF
OBE
AD
EPA0
EPA1
EPA2
EPA3
†
EPA x
†
This interrupt is cleared when all EPA interrupt pending bits (EPA_PEND and
EPA_PEND1) are cleared.
— RI
AD EPA0
Function
External
SIO Receive
SIO Transmit
SSIO1 Transfer
SSIO0 Transfer
Slave Port Command Buffer Full
Slave Port Input Buffer Full
Slave Port Output Buffer Empty
A/D Conversion Complete
EPA Capture/Compare Channel 0
EPA Capture/Compare Channel 1
EPA Capture/Compare Channel 2
EPA Capture/Compare Channel 3
Multiplexed EPA
Address:
Reset State:
TI SSIO1 SSIO0
EPA1 EPA2
Standard Vector
FF203CH
FF2038H
FF2036H
FF2034H
FF2032H
FF2030H
FF200EH
FF200CH
FF200AH
FF2008H
FF2006H
FF2004H
FF2002H
FF2000H
REGISTERS
PTSSRV
0006H
0000H
8
CBF
0
EPA3 EPA x
C-47