Intel 8XC196NT User Manual page 412

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Opcode
x 8
SHR
0 x
SHRB
1 x
2 x
3 x
bit 0
4 x
di
5 x
di
6 x
di
7x
di
8 x
di
9 x
di
A x
di
B x
di
C x
di
JST
D x
ELD
E x
in
CLRC
F x
NOTES:
1.
This opcode is reserved, but it does not generate an unimplemented opcode interrupt.
2.
Signed multiplication and division are two-byte instructions. The first byte is "FE" and the second is the
opcode of the corresponding unsigned instruction.
Table A-1. Opcode Map (Right Half)
x 9
x A
SHL
SHRA
XCH
SHLB
SHRAB
XCHB
bit 1
bit 2
bit 3
SUB 3op
im
in
SUBB 3op
im
in
SUB 2op
im
in
SUBB 2op
im
in
CMP
im
in
CMPB
im
in
SUBC
im
in
SUBCB
im
in
PUSH
im
in
JH
JLE
ELD
ELDB
ELDB
ix
in
SETC
DI
INSTRUCTION SET REFERENCE
x B
x C
x D
SHRL
SHLL
ix
EST
EST
ix
in
ix
SCALL
JBS
bit 4
bit 5
MULU 3op (Note 2)
ix
di
im
MULUB 3op (Note 2)
ix
di
im
MULU 2op (Note 2)
ix
di
im
MULUB 2op (Note 2)
ix
di
im
DIVU (Note 2)
ix
di
im
DIVUB (Note 2)
ix
di
im
ix
di
im
ix
di
im
POP
BMOVI
ix
di
JC
JVT
JV
DPTS
EPTS
ix
EI
CLRVT
NOP
x E
x F
SHRAL
NORML
ESTB
ESTB
in
ix
bit 6
bit 7
in
ix
in
ix
in
ix
in
ix
in
ix
in
ix
LDBZE
in
ix
LDBSE
in
ix
POP
in
ix
JLT
JE
(Note 1)
LCALL
signed
RST
MUL/DIV
(Note 2)
A-3

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