Intel 8XC196NT User Manual page 171

8XC196NT USER'S MANUAL
Internal Bus
EP_REG
Address Bit from
Address MUX
EP_MODE
EP_DIR
POWERDOWN#
IDLE#
HOLD#
Read Port
6-22
0
DATA
1
Sample
Latch
EP_PIN
Q D
LE
PH1 Clock
300ns Delay
RESET#
Figure 6-5. EPORT Structure
RESET#
Vcc
Vss
150Ω to 200Ω
Buffer
Vcc
Medium
Pullup
Q3
Vcc
Weak
Pullup
Q4
Q1
I/O Pin
Q2
R1
A0241-02