Intel 8XC196NT User Manual page 482

Name Type
ADV# O
AINC# I
ALE O
ANGND GND
BHE# O
Table B-4. Signal Descriptions (Continued)
Address Valid
This active-low output signal is asserted only during external memory
accesses. ADV# indicates that valid address information is available on the
system address/data bus. The signal remains low while a valid bus cycle is in
progress and is returned high as soon as the bus cycle completes.
An external latch can use this signal to demultiplex the address from the
address/data bus. A decoder can also use this signal to generate chip selects
for external memory.
ADV# is multiplexed with P5.0, SLPALE, and ALE.
Auto Increment
During slave programming, this active-low input enables the auto-increment
feature. (Auto increment allows reading or writing of sequential OTPROM
locations, without requiring address transactions across the PBUS for each
read or write.) AINC# is sampled after each location is programmed or dumped.
If AINC# is asserted, the address is incremented and the next data word is
programmed or dumped.
AINC# is multiplexed with P2.4 and INTOUT#.
Address Latch Enable
This active-high output signal is asserted only during external memory cycles.
ALE signals the start of an external bus cycle and indicates that valid address
information is available on the system address/data bus. ALE differs from ADV#
in that it does not remain active during the entire bus cycle.
An external latch can use this signal to demultiplex the address from the
address/data bus.
ALE is multiplexed with P5.0, SLPALE, and ADV#.
Analog Ground
ANGND must be connected for A/D converter and port 0 operation. ANGND
and V should be nominally at the same potential.
SS
Byte High Enable
The chip configuration register 0 (CCR0) determines whether this pin functions
as BHE# or WRH#. CCR0.2=1 selects BHE#; CCR0.2=0 selects WRH#.
During 16-bit bus cycles, this active-low output signal is asserted for word reads
and writes and high-byte reads and writes to external memory. BHE# indicates
that valid data is being transferred over the upper half of the system data bus.
Use BHE#, in conjunction with AD0, to determine which memory byte is being
transferred over the system bus:
BHE# AD0 Byte(s) Accessed
0 0 both bytes
0 1 high byte only
1 0 low byte only
BHE# is multiplexed with P5.5 and WRH#.
SIGNAL DESCRIPTIONS
Description
B-5