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The input frequency at which this occurs depends on the length of the interrupt service routine as
well as other factors. Unless the interrupt service routine includes a check for overruns, this situ-
ation will remain the same until the device is reset or the EPAx_TIME register is read. The act of
reading EPAx_TIME allows the buffered time value to be moved into EPAx_TIME. This clears
the buffer and allows another event to be captured. Remember that the act of the transferring the
buffer contents to the EPAx_TIME register is what actually sets the EPAx interrupt pending bit
and generates the interrupt.
Any one of the following methods can be used to prevent or recover from this situation.
•
Clear EPAx_CON.0
When the overwrite bit (EPAx_CON.0) is zero, the EPA does not consider the captured
edge until the EPAx_TIME register is read and the data in the capture buffer is transferred to
EPAx_TIME. This prevents the situation by ignoring new input capture events when both
the capture buffer and EPAx_TIME contain valid capture times. The OVRx pending bit in
EPA_PEND is set to indicate that an overrun occurred.
•
Enable the OVRx interrupt and read the EPAx_TIME register within the ISR
If this situation occurs, the overrun (OVRx) interrupt will be generated. The OVRx interrupt
will then be acknowledged and its interrupt service routine will read the EPAx_TIME regis-
ter. After the CPU reads the EPAx_TIME register, the buffered data moves from the buffer
to the EPAx_TIME register. This sets the EPA interrupt pending bit.
•
Check for pending EPAx interrupts before exiting an EPAx ISR
Another method for avoiding this situation is to check for pending EPA interrupts before
exiting the EPA interrupt service routine. This is an easy way to detect overruns and addi-
tional interrupts. It can also save loop time by eliminating the latency necessary to service
the pending interrupt. However, this method cannot be used with the peripheral transaction
server (PTS). If your system uses the PTS, you should choose one of the other methods.
10.4.2 Operating in Compare Mode
When the selected timer value matches the event-time value, the action specified in the control
register occurs (i.e., the pin is set, cleared, or toggled, or an A/D conversion is initiated). If the re-
enable bit (EPAx_CON.3 or COMPx_CON.3) is set, the action reoccurs on every timer match. If
the re-enable bit is cleared, the action does not reoccur until a new value is written to the event-
time register. See "Programming the Capture/Compare Channels" on page 10-20 and "Program-
ming the Compare-only Channels" on page 10-25 for configuration information.
In compare mode, you can use the EPA to produce a pulse-width modulated (PWM) output. The
following sections describe four possible methods.
EVENT PROCESSOR ARRAY (EPA)
10-13
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