Programming The Multiplexed Interrupts - Intel 8XC196NT User Manual

To disable any interrupt, clear its mask bit. To enable an interrupt for standard interrupt service,
set its mask bit and clear its PTS select bit. To enable an interrupt for PTS service, set both the
mask bit and the PTS select bit.
When you assign an interrupt to the PTS, you must set up a PTS control block (PTSCB) for each
interrupt source (see "Initializing the PTS Control Blocks" on page 5-18) and use the EPTS in-
struction to globally enable the PTS. When you assign an interrupt to a standard software service
routine, use the EI (enable interrupts) instruction to globally enable interrupt servicing.
PTS routines will execute after a DI (disable interrupts) instruction, if the
appropriate INT_MASK and PTSSEL bits are set. However, the end-of-PTS
interrupt request will not be serviced. If an interrupt request occurs while
interrupts are disabled, the corresponding pending bit is set in the INT_PEND
or INT_PEND1 register.
5.5.1

Programming the Multiplexed Interrupts

The EPA4–9 and COMP0–1 event interrupts, the EPA0–9 overrun interrupts, and the timer 1 and
timer 2 overflow/underflow interrupts are multiplexed into EPAx. Write to the EPA_MASK (Fig-
ure 10-12 on page 10-27) or EPA_MASK1 (Figure 10-13 on page 10-27) registers to enable or
disable the multiplexed EPA interrupt sources and INT_MASK.0 to enable or disable the EPAx
interrupt.
The PTS cannot determine the source of multiplexed interrupts, so do not use it to service these
interrupts if more than one multiplexed interrupt is unmasked.
STANDARD AND PTS INTERRUPTS
NOTE
5-11