Epa Functional Overview - Intel 8XC196NT User Manual

Table of Contents

Advertisement

CHAPTER 10
EVENT PROCESSOR ARRAY (EPA)
Control applications often require high-speed event control. For example, the controller may need
to periodically generate pulse-width modulated outputs, an analog-to-digital conversion, or an in-
terrupt. In another application, the controller may monitor an input signal to determine the status
of an external device. The event processor array (EPA) was designed to reduce the CPU overhead
associated with these types of event control. This chapter describes the EPA and its timers and
explains how to configure and program them.

10.1 EPA FUNCTIONAL OVERVIEW

The EPA performs input and output functions associated with two timer/counters, timer 1 and
timer 2 (Figure 10-1). In the input mode, the EPA monitors an input pin for an event: a rising edge,
a falling edge, or an edge in either direction. When the event occurs, the EPA records the value
of the timer/counter, so that the event is tagged with a time. This is called an input capture. Input
captures are buffered to allow two captures before an overrun occurs. In the output mode, the EPA
monitors a timer/counter and compares its value with a value stored in a register. When the tim-
er/counter value matches the stored value, the EPA can trigger an event: a timer reset, an A/D
conversion, or an output event (set a pin, clear a pin, toggle a pin, or take no action). This is called
an output compare. The EPA sets an interrupt pending bit in response to an input capture or an
output compare. This bit can optionally cause an interrupt. The EPA has ten capture/compare
channels (EPA0–9) and two compare-only channels (COMP0 and COMP1). The two compare-
only channels share output pins with two of the capture/compare channels (EPA8 and EPA9).
10-1

Advertisement

Table of Contents
loading

Table of Contents