Table of Contents
Advertisement
14.7.3 Address Valid Strobe Mode
When the address valid strobe mode is selected, the device generates the address valid signal
(ADV#) instead of the address latch enable signal (ALE). ADV# is asserted after an external ad-
dress is valid (see Figure 14-16). This signal can be used to latch the valid address and simulta-
neously enable an external memory device.
ADV#
WR# or RD#
BHE#
AD15:0
A19:16
The difference between ALE and ADV# is that ADV# is asserted for the entire bus cycle, not just
to latch the address. Figure 14-17 shows the difference between ALE and ADV# for a single read
or write cycle. Note that for back-to-back bus access, the ADV# function will look identical to
the ALE function. The difference becomes apparent only when the bus is idle. Because ADV# is
high during these periods, external memory will be disabled, thus saving power.
Valid
Address
Data Out
Extended Address
16-bit Bus Cycle
Figure 14-16. Address Valid Strobe Mode
INTERFACING WITH EXTERNAL MEMORY
ADV#
WR# or RD#
Addr
AD7:0
Low
AD15:0
A19:16
Data Out
Address High
Extended Address
8-bit Bus Cycle
A0289-02
14-29
Advertisement
Table of Contents
