Reserved Memory Locations; Interrupt And Pts Vectors; Security Key - Intel 8XC196NT User Manual

Table 4-4. 8XC196NT Special-purpose Memory Addresses
Address
(Hex)
FF207F
FF205E
FF205D
FF2040
FF203F
FF2030
FF202F
FF2020
FF201F
FF201E
FF201D
FF201C
FF201B
FF201A
FF2019
FF2018
FF2017
FF2014
FF2013
FF2000
4.2.2.3

Reserved Memory Locations

Several memory locations are reserved for testing or for use in future products. Do not read or
write these locations except to initialize them to the values shown in Table 4-3. The function or
contents of these locations may change in future revisions; software that uses reserved locations
may not function properly.
4.2.2.4

Interrupt and PTS Vectors

The upper and lower interrupt vectors contain the addresses of the interrupt service routines. The
peripheral transaction server (PTS) vectors contain the addresses of the PTS control blocks. See
Chapter 5, "Standard and PTS Interrupts," for more information on interrupt and PTS vectors.
4.2.2.5

Security Key

The security key prevents unauthorized programming access to the OTPROM. See Chapter 15,
"Programming the Nonvolatile Memory," for details.
Reserved (each byte must contain FFH)
PTS vectors
Upper interrupt vectors
Security key
Reserved (must contain 20H for compatibility with future devices)
Reserved (must contain FFH)
Reserved (must contain 20H)
CCB2
Reserved (must contain 20H)
CCB1
Reserved (must contain 20H)
CCB0
Reserved (each byte must contain FFH)
Lower interrupt vectors
MEMORY PARTITIONS
Description
4-7