Intel 8XC196NT User Manual page 449

8XC196NT USER'S MANUAL
Mnemonic
SHRL LOGICAL RIGHT SHIFT DOUBLE-WORD.
Shifts the destination double-word operand to
the right as many times as specified by the
count operand. The count may be specified
either as an immediate value in the range of 0
to 15 (0FH), inclusive, or as the content of
any register (10H – 0FFH) with a value in the
range of 0 to 31 (1FH), inclusive. The left bits
of the result are filled with zeroes. The last bit
shifted out is saved in the carry flag.
←
Temp
do while Temp
←
C
(DEST)
Temp
end_while
Z
SJMP SHORT JUMP. Adds to the program counter
the offset between the end of this instruction
and the target label, effecting the jump. The
offset must be in the range of –1024 to
+1023, inclusive.
←
PC PC + 11-bit disp
Z
—
SKIP TWO BYTE NO-OPERATION. Does nothing.
Control passes to the next sequential
instruction. This is actually a two-byte NOP in
which the second byte can be any value and
is simply ignored.
Z
—
A-40
Table A-6. Instruction Set (Continued)
Operation
(COUNT)
≠
0
Low order bit of (DEST)
←
(DEST)/2)
←
Temp – 1
PSW Flag Settings
N C V VT
0 0 —
PSW Flag Settings
N C V VT
— — — —
PSW Flag Settings
N C V VT
— — — —
Instruction Format
SHRL lreg,#count
(00001100) (count) (lreg)
or
SHRL lreg,breg
(00001100) (breg) (lreg)
NOTES: This instruction clears the
sticky bit flag at the beginning
of the instruction. If at any time
during the shift a "1" is shifted
into the carry flag and another
shift cycle occurs, the instruc-
tion sets the sticky bit flag.
In this operation, DEST/2 rep-
resents unsigned division.
ST
SJMP cadd
(00100xxx) (disp-low)
NOTE: The displacement (disp) is sign-
extended to 16 bits in the 64-
Kbyte addressing mode and to 24
bits in the 1-Mbyte addressing
ST
mode. This displacement may
—
cause the program counter to
cross a page boundary in 1-Mbyte
mode.
SKIP breg
(00000000) (breg)
ST
—