Slave Port Modes; Standard Slave Mode Example; Master Device Program - Intel 8XC196NT User Manual

8XC196NT USER'S MANUAL
9.4

SLAVE PORT MODES

The slave port can operate in either standard slave mode or shared memory mode. In both modes,
the master and slave share a 256-byte block of memory located anywhere within the slave's mem-
ory space. Data written is stored in the slave's P3_PIN register; data to be read is stored in the
slave's P3_REG register. The standard slave mode supports either a demultiplexed or a multi-
plexed bus and uses the command buffer full (CBF) interrupt. The shared memory mode supports
only a multiplexed bus and uses the input buffer empty (IBE) and output buffer full (OBF) inter-
rupts. In both modes, the interrupts must be processed by a software interrupt service routine.
9.4.1

Standard Slave Mode Example

In standard slave mode, the master and slave share a 256-byte block of memory. The high byte of
the address (the base address) selects the location within the slave's memory space. The master
writes the low byte of the address to the slave's command register (SLP_CMD). This mode can
be used with either a multiplexed or a demultiplexed bus.
In this example, the master and slave share a 256-byte block of memory from 0400–04FFH. The
master device has arbitrary external memory locations that are dedicated to slave port accesses.
9.4.1.1

Master Device Program

The following code segment illustrates the simple method for writing to the slave.
EXT_P3_PIN EQU
EXT_SLP_CMD EQU
STB
STB
The master first writes data to the P3_PIN register, which clears the IBE flag in the slave's
SLP_STAT register and pulls SLPINT low. This notifies the slave to perform a data write at the
address BASE + SLP_CMD.
The following code segment illustrates the equally simple method for reading from the slave.
EXT_P3_REG EQU
EXT_SLP_CMD EQU
LDB
STB
LDB DATA, EXT_P3_REG
9-8
0FFFDH
0FFFEH
DATA, EXT_P3_PIN
ADDR, EXT_SLP_CMD
0FFFCH
0FFFEH
TEMP, EXT_P3_REG
ADDR, EXT_SLP_CMD
; (A1=0)
; (A1=1)
; write the data into the slave's P3_PIN
; write address LSB into slave's SLP_CMD
; wait for SLPINT to go high
; (A1=0)
; (A1=1)
; clear slave's P3_REG
; write address LSB into slave's SLP_CMD
; ... wait for SLPINT to go high
; read the data from P3_REG