Hitachi H8/3048 Hardware Manual page 401

Single-chip microcomputer
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Note on Synchronous Preset: When channels are synchronized, if a TCNT value is modified by
byte write access, all 16 bits of all synchronized counters assume the same value as the counter
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that was addressed.
(Example) When channels 2 and 3 are synchronized
• Byte write to channel 2 or byte write to channel 3
TCNT2
W
TCNT3
Y
Upper byte Lower byte
W d
it t
Note on Setup of Reset-Synchronized PWM Mode and Complementary PWM Mode: When
setting bits CMD1 and CMD0 in TFCR, take the following precautions:
Write to bits CMD1 and CMD0 only when TCNT3 and TCNT4 are stopped.
Do not switch directly between reset-synchronized PWM mode and complementary PWM
mode. First switch to normal mode (by clearing bit CMD1 to 0), then select reset-
synchronized PWM mode or complementary PWM mode.
Write A to upper byte
of channel 2
X
Z
Write A to lower byte
of channel 3
h
l 2
d
it t
TCNT2
TCNT3
TCNT2
TCNT3
h
l 3
389
A
X
A
X
Upper byte Lower byte
Y
A
Y
A
Upper byte Lower byte

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