On-Chip Supporting Module Access Timing - Hitachi H8/3048 Hardware Manual

2.9.3 On-Chip Supporting Module Access Timing

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The on-chip supporting modules are accessed in three states. The data bus is 8 or 16 bits wide,
depending on the register being accessed. Figure 2-17 shows the on-chip supporting module
access timing. Figure 2-18 indicates the pin states.
ø
Address bus
Internal read signal
Read
access
Internal data bus
Internal write signal
Write
access
Internal data bus
Figure 2-17 Access Cycle for On-Chip Supporting Modules
Bus cycle
T state T state
1 2
Address
Read data
Write data
53
T state
3