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H8/3048 Series
Chip
Card-processing device
Figure 14-2 Smart Card Interface Connection Diagram
Note: A loop-back test can be performed by setting both RE and TE to 1 without connecting a
smart card.
14.3.3 Data Format
Figure 14-3 shows the data format of the smart card interface. In receive mode, parity is checked
once per frame. If a parity error is detected, an error signal is returned to the transmitting device to
request retransmission. In transmit mode, the error signal is sampled and the same data is
retransmitted if the error signal is low.
No parity error
Ds
D0
Parity error
Ds
D0
Ds:
Start bit
D0 to D7:
Data bits
Dp:
Parity bit
DE:
Error signal
Figure 14-3 Smart Card Interface Data Format
TxD
0
RxD
0
SCK
0
Px (port)
D1
D2
D3
D4
Output from transmitting device
D1
D2
D3
D4
Output from transmitting device
506
V
CC
I/O
Data line
CLK
Clock line
RST
Reset line
Smart card
D5
D6
D7
Dp
D5
D6
D7
Dp
DE
Output from
receiving device
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