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Table 1-3 Pin Functions (cont)
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Type
Symbol
System control RES
RESO
(RESO/V
STBY
BREQ
BACK
Interrupts
NMI
IRQ
IRQ
Address bus
A
23
Data bus
D
15
Bus control
CS
AS
RD
HWR
LWR
WAIT
Pin No.
I/O
63
Input
10
Output Reset output: Outputs a reset signal to
)
PP
62
Input
59
Input
60
Output Bus request acknowledge: Indicates that the
64
Input
to
17, 16,
Input
5
90 to 87
0
to A
97 to 100,
Output Address bus: Outputs address signals
0
56 to 45,
43 to 36
to D
34 to 23,
Input/
0
21 to 18
output
to CS
8, 97 to 99, Output Chip select: Select signals for areas 7 to 0
7
0
88 to 91
69
Output Address strobe: Goes low to indicate valid
70
Output Read: Goes low to indicate reading from the
71
Output High write: Goes low to indicate writing to the
72
Output Low write: Goes low to indicate writing to the
58
Input
Name and Function
Reset input: When driven low, this pin resets
the chip
external devices
Also used as a power supply for on-board
programming of the flash memory version.
Standby: When driven low, this pin forces
a transition to hardware standby mode
Bus request: Used by an external bus master
to request the bus right
bus has been granted to an external bus
master
Nonmaskable interrupt: Requests a
nonmaskable interrupt
Interrupt request 5 to 0: Maskable interrupt
request pins
Data bus: Bidirectional data bus
address output on the address bus
external address space
external address space; indicates valid data on
the upper data bus (D
external address space; indicates valid data on
the lower data bus (D
Wait: Requests insertion of wait states in bus
cycles during access to the external address
space
11
to D
).
15
8
to D
).
7
0
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