Data Bus - Hitachi H8/3048 Hardware Manual

6.3.3 Data Bus

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The H8/3048 Series allows either 8-bit access or 16-bit access to be designated for each of
areas 0 to 7. An 8-bit-access area uses the upper data bus (D
both the upper data bus (D
RD signal applies without distinction to both the upper and lower data bus. In
In read access the
write access the HWR signal applies to the upper data bus, and the LWR signal applies to the
lower data bus.
Table 6-4 indicates how the two parts of the data bus are used under different access conditions.
Table 6-4 Access Conditions and Data Bus Usage
Access Read/
Area Size
8-bit-access
—
area
16-bit-access
Byte
area
Word
Note: Undetermined data means that unpredictable data is output.
Invalid means that the bus is in the input state and the input is ignored.
to D ) and lower data bus (D
15 8
Valid
Write Address Strobe
RD
Read —
HWR
Write —
RD
Read Even
Odd
HWR
Write Even
LWR
Odd
RD
Read —
HWR, LWR Valid
Write —
124
to D ). A 16-bit-access area uses
15 8
to D ).
7 0
Upper Data Bus Lower Data Bus
(D to D ) (D
15 8 7
Valid Invalid
Undetermined data
Valid Invalid
Invalid Valid
Valid Undetermined data
Undetermined data Valid
Valid Valid
Valid
to D )
0