Hitachi H8/3048 Hardware Manual page 176

Single-chip microcomputer
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Self-Refresh Mode: Some DRAM devices have a self-refresh function. After the SRFMD bit is
set to 1 in RFSHCR, when a transition to software standby mode occurs, the CAS and RAS
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outputs go low in that order so that the DRAM self-refresh function can be used. On exit from
software standby mode, the CAS and RAS outputs both go high.
Table 7-7 shows the pin states in software standby mode. Figure 7-6 shows the signal output
timing.
Table 7-7 Pin States in Software Standby Mode (1) (PSRAME = 0, DRAME = 1)
Signal
CAS/WE = 0
HWR
High-impedance
LWR
High-impedance
RD
High-impedance
CS
High
3
RFSH
High
Software Standby Mode
SRFMD = 0
CAS/WE = 1
High-impedance
High-impedance
High-impedance
High
High
162
SRFMD = 1 (self-refresh mode)
CAS/WE = 0
CAS/WE = 1
High
Low
High
Low
Low
High
Low
Low
Low
Low

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