Hitachi H8/3048 Hardware Manual page 217

Bit 6—Reserved: Although reserved, this bit can be written and read.
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Bit 5—Destination Address Increment/Decrement (DAID) and Bit 4—Destination Address
Increment/Decrement Enable (DAIDE): These bits select whether the destination address
register (MARB) is incremented, decremented, or held fixed during the data transfer.
Bit 5 Bit 4
DAID DAIDE
0 0
1
1 0
1
Bit 3—Transfer Mode Select (TMS): Selects whether the source or destination is the block area
in block transfer mode.
Bit 3
TMS Description
0 Destination is the block area in block transfer mode
1 Source is the block area in block transfer mode
Description
MARB is held fixed
MARB is incremented after each data transfer
• If DTSZ = 0, MARB is incremented by 1 after each data transfer
• If DTSZ = 1, MARB is incremented by 2 after each data transfer
MARB is held fixed
MARB is decremented after each data transfer
• If DTSZ = 0, MARB is decremented by 1 after each data transfer
• If DTSZ = 1, MARB is decremented by 2 after each data transfer
203
(Initial value)
(Initial value)