Hitachi H8/3048 Hardware Manual page 721

Table A-1 Instruction Set (cont)
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Mnemonic Operation
ERd32+1 → ERd32
INC.L #1, ERd L
ERd32+2 → ERd32
INC.L #2, ERd L
DAA Rd B Rd8 decimal adjust
→ Rd8
Rd8–Rs8 → Rd8
SUB.B Rs, Rd B
W Rd16–#xx:16 → Rd16
SUB.W #xx:16, Rd
W Rd16–Rs16 → Rd16
SUB.W Rs, Rd
SUB.L #xx:32, ERd L ERd32–#xx:32
→ ERd32
SUB.L ERs, ERd L ERd32–ERs32
→ ERd32
Rd8–#xx:8–C → Rd8
SUBX.B #xx:8, Rd B
Rd8–Rs8–C → Rd8
SUBX.B Rs, Rd B
ERd32–1 → ERd32
SUBS.L #1, ERd L
ERd32–2 → ERd32
SUBS.L #2, ERd L
ERd32–4 → ERd32
SUBS.L #4, ERd L
Rd8–1 → Rd8
DEC.B Rd B
W Rd16–1 → Rd16
DEC.W #1, Rd
W Rd16–2 → Rd16
DEC.W #2, Rd
ERd32–1 → ERd32
DEC.L #1, ERd L
ERd32–2 → ERd32
DEC.L #2, ERd L
DAS.Rd B Rd8 decimal adjust
→ Rd8
Rd8 × Rs8 → Rd16
MULXU. B Rs, Rd B
(unsigned multiplication)
W Rd16 × Rs16 → ERd32
MULXU. W Rs, ERd
(unsigned multiplication)
Rd8 × Rs8 → Rd16
MULXS. B Rs, Rd B
(signed multiplication)
W Rd16 × Rs16 → ERd32
MULXS. W Rs, ERd
(signed multiplication)
Rd16 ÷ Rs8 → Rd16
DIVXU. B Rs, Rd B
(RdH: remainder,
RdL: quotient)
(unsigned division)
Addressing Mode and
Instruction Length (bytes)
2
2
2
2
4
2
6
2
2
2
2
2
2
2
2
2
2
2
2
2
2
4
4
2
714
No. of
States
Condition Code
I H N Z V C
— — — 2
— — — 2
— * * — 2
— 2
— (1) 4
— (1) 2
— (2) 6
— (2) 2
— (3) 2
— (3) 2
— — — — — — 2
— — — — — — 2
— — — — — — 2
— — — 2
— — — 2
— — — 2
— — — 2
— — — 2
— * * — 2
— — — — — — 14
— — — — — — 22
— — — — 16
— — — — 24
— — (6) (7) — — 14
*1