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SCR—Serial Control Register
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Bit
7
TIE
Initial value
0
Read/Write
R/W
Clock enable 1 and 0
Bit 1
Bit 0
CKE1
CKE0
0
1
Transmit-end interrupt enable
0 Transmit-end interrupt requests (TEI) are disabled
1 Transmit-end interrupt requests (TEI) are enabled
Multiprocessor interrupt enable
0 Multiprocessor interrupts are disabled (normal receive operation)
1 Multiprocessor interrupts are enabled
Transmit enable
0 Transmitting is disabled
1 Transmitting is enabled
Receive interrupt enable
0 Receive-data-full (RXI) and receive-error (ERI) interrupt requests are disabled
1 Receive-data-full (RXI) and receive-error (ERI) interrupt requests are enabled
Transmit interrupt enable
0 Transmit-data-empty interrupt request (TXI) is disabled
1 Transmit-data-empty interrupt request (TXI) is enabled
6
5
RIE
TE
0
0
R/W
R/W
R/W
Clock Selection and Output
0
Asynchronous mode
Synchronous mode
1
Asynchronous mode
Synchronous mode
0
Asynchronous mode
Synchronous mode
1
Asynchronous mode
Synchronous mode
798
H'B2
4
3
2
RE
MPIE
TEIE
0
0
0
R/W
R/W
Internal clock, SCK pin available for generic I/O
Internal clock, SCK pin used for serial clock output
Internal clock, SCK pin used for clock output
Internal clock, SCK pin used for serial clock output
External clock, SCK pin used for clock input
External clock, SCK pin used for serial clock input
External clock, SCK pin used for clock input
External clock, SCK pin used for serial clock input
Receive enable
0 Receiving is disabled
1 Receiving is enabled
SCI0
1
0
CKE1
CKE0
0
0
R/W
R/W
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