Hitachi H8/3048 Hardware Manual page 729

Single-chip microcomputer
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Table A-1 Instruction Set (cont)
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7. System control instructions
Mnemonic
Operation
— PC → @–SP
TRAPA #x:2
CCR → @–SP
<vector> → PC
— CCR ← @SP+
RTE
PC ← @SP+
SLEEP
— Transition to power-
down state
#xx:8 → CCR
LDC #xx:8, CCR
B
Rs8 → CCR
LDC Rs, CCR
B
W @ERs → CCR
LDC @ERs, CCR
W @(d:16, ERs) → CCR
LDC @(d:16, ERs),
CCR
W @(d:24, ERs) → CCR
LDC @(d:24, ERs),
CCR
W @ERs → CCR
LDC @ERs+, CCR
ERs32+2 → ERs32
W @aa:16 → CCR
LDC @aa:16, CCR
W @aa:24 → CCR
LDC @aa:24, CCR
CCR → Rd8
STC CCR, Rd
B
W CCR → @ERd
STC CCR, @ERd
W CCR → @(d:16, ERd)
STC CCR, @(d:16,
ERd)
W CCR → @(d:24, ERd)
STC CCR, @(d:24,
ERd)
W ERd32–2 → ERd32
STC CCR, @–ERd
CCR → @ERd
W CCR → @aa:16
STC CCR, @aa:16
W CCR → @aa:24
STC CCR, @aa:24
CCR∧#xx:8 → CCR
ANDC #xx:8, CCR
B
CCR∨#xx:8 → CCR
ORC #xx:8, CCR
B
CCR⊕#xx:8 → CCR
XORC #xx:8, CCR
B
— PC ← PC+2
NOP
Addressing Mode and
Instruction Length (bytes)
2
2
2
4
6
10
4
6
8
2
4
6
10
4
6
8
2
2
2
2 — — — — — —
722
No. of
States
Condition Code
I
H N Z
V C
1 — — — — —
14
16
10
— — — — — —
2
2
2
6
8
12
8
8
10
— — — — — —
2
— — — — — —
6
— — — — — —
8
— — — — — —
12
— — — — — —
8
— — — — — —
8
— — — — — —
10
2
2
2
2
*1

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