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21.4.1
Bus Timing ..................................................................................................... 686
21.4.2
Refresh Controller Bus Timing....................................................................... 690
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21.4.3
Control Signal Timing .................................................................................... 695
21.4.4
Clock Timing .................................................................................................. 697
21.4.5
TPC and I/O Port Timing................................................................................ 697
21.4.6
ITU Timing ..................................................................................................... 698
21.4.7
SCI Input/Output Timing................................................................................ 699
21.4.8
DMAC Timing................................................................................................ 700
A.1
Instruction List................................................................................................................ 703
A.2
Operation Code Map....................................................................................................... 718
A.3
Number of States Required for Execution...................................................................... 721
B.1
Addresses........................................................................................................................ 730
B.2
Function .......................................................................................................................... 738
Appendix C I/O Port Block Diagrams
C.1
Port 1 Block Diagram ..................................................................................................... 818
C.2
Port 2 Block Diagram ..................................................................................................... 819
C.3
Port 3 Block Diagram ..................................................................................................... 820
C.4
Port 4 Block Diagram ..................................................................................................... 821
C.5
Port 5 Block Diagram ..................................................................................................... 822
C.6
Port 6 Block Diagrams.................................................................................................... 823
C.7
Port 7 Block Diagrams.................................................................................................... 827
C.8
Port 8 Block Diagrams.................................................................................................... 828
C.9
Port 9 Block Diagrams.................................................................................................... 831
C.10
Port A Block Diagrams................................................................................................... 835
C.11
Port B Block Diagrams................................................................................................... 839
Appendix D Pin States
D.1
Port States in Each Mode................................................................................................ 843
D.2
Pin States at Reset........................................................................................................... 846
Appendix E Timing of Transition to and Recovery from Hardware Standby Mode
Appendix F
Product Code Lineup
Appendix G Package Dimensions
............................................................................................ 703
................................................................................. 730
........................................................................ 818
..................................................................................................... 843
............................................................................... 850
................................................................................ 852
.... 849
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