Hitachi H8/3048 Hardware Manual page 359

Single-chip microcomputer
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Example of Synchronization: Figure 10-27 shows an example of synchronization. Channels 0, 1,
and 2 are synchronized, and are set to operate in PWM mode. Channel 0 is set for counter clearing
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by compare match with GRB0. Channels 1 and 2 are set for synchronous counter clearing. The
timer counters in channels 0, 1, and 2 are synchronously preset, and are synchronously cleared by
compare match with GRB0. A three-phase PWM waveform is output from pins TIOCA
TIOCA
, and TIOCA
1
Value of TCNT0 to TCNT2
GRB0
GRB1
GRA0
GRB2
GRA1
GRA2
H'0000
TIOCA
0
TIOCA
1
. For further information on PWM mode, see section 10.4.4, PWM Mode.
2
Cleared by compare match with GRB0
Figure 10-27 Synchronization (Example)
347
,
0
Time

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