Hitachi H8/3048 Hardware Manual page 51

Single-chip microcomputer
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Table 2-9 System Control Instructions
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Instruction Size*
Function
TRAPA
Starts trap-instruction exception handling
RTE
Returns from an exception-handling routine
SLEEP
Causes a transition to the power-down state
(EAs) → CCR
LDC
B/W
Moves the source operand contents to the condition code register. The
condition code register size is one byte, but in transfer from memory, data is
read by word access.
CCR → (EAd)
STC
B/W
Transfers the CCR contents to a destination location. The condition code
register size is one byte, but in transfer to memory, data is written by word
access.
CCR ∧ #IMM → CCR
ANDC
B
Logically ANDs the condition code register with immediate data.
CCR ∨ #IMM → CCR
ORC
B
Logically ORs the condition code register with immediate data.
CCR ⊕ #IMM → CCR
XORC
B
Logically exclusive-ORs the condition code register with immediate data.
PC + 2 → PC
NOP
Only increments the program counter.
Note: * Size refers to the operand size.
B: Byte
W: Word
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