Hitachi H8/3048 Hardware Manual page 789

Single-chip microcomputer
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TOER—Timer Output Enable Register
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Bit
7
Initial value
1
Read/Write
Master enable TIOCA3
0 TIOCA output is disabled regardless of TIOR3, TMDR, and TFCR settings
1 TIOCA is enabled for output according to TIOR3, TMDR, and TFCR settings
Master enable TIOCA4
0 TIOCA output is disabled regardless of TIOR4, TMDR, and TFCR settings
1 TIOCA is enabled for output according to TIOR4, TMDR, and TFCR settings
Master enable TIOCB4
0 TIOCB output is disabled regardless of TIOR4 and TFCR settings
4
1 TIOCB is enabled for output according to TIOR4 and TFCR settings
4
Master enable TIOCB3
0 TIOCB output is disabled regardless of TIOR3 and TFCR settings
3
1 TIOCB is enabled for output according to TIOR3 and TFCR settings
3
Master enable TOCXA4
0 TOCXA output is disabled regardless of TFCR settings
4
1 TOCXA is enabled for output according to TFCR settings
4
Master enable TOCXB4
0 TOCXB output is disabled regardless of TFCR settings
4
1 TOCXB is enabled for output according to TFCR settings
4
6
5
EXB4
EXA4
1
1
R/W
3
3
4
4
782
H'90
4
3
2
EB3
EB4
1
1
1
R/W
R/W
R/W
ITU (all channels)
1
0
EA4
EA3
1
1
R/W
R/W

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