Hitachi H8/3048 Hardware Manual page 111

Single-chip microcomputer
Table of Contents

Advertisement

Table 5-3 Interrupt Sources, Vector Addresses, and Priority
www.DataSheet4U.com
Interrupt Source
NMI
IRQ
0
IRQ
1
IRQ
2
IRQ
3
IRQ
4
IRQ
5
Reserved
WOVI
(interval timer)
CMI
(compare match)
Reserved
IMIA0
(compare match/
input capture A0)
IMIB0
(compare match/
input capture B0)
OVI0 (overflow 0)
Reserved
IMIA1
(compare match/
input capture A1)
IMIB1
(compare match/
input capture B1)
OVI1 (overflow 1)
Reserved
Note: * Lower 16 bits of the address.
Vector
Origin
Number
External pins
7
12
13
14
15
16
17
18
19
Watchdog
20
timer
Refresh
21
controller
22
23
ITU channel 0
24
25
26
27
ITU channel 1
28
29
30
31
97
Vector Address*
H'001C to H'001F
H'0030 to H'0033
H'0034 to H0037
H'0038 to H'003B
H'003C to H'003F
H'0040 to H'0043
H'0044 to H'0047
H'0048 to H'004B
H'004C to H'004F
H'0050 to H'0053
H'0054 to H'0057
H'0058 to H'005B
H'005C to H'005F
H'0060 to H'0063
H'0064 to H'0067
H'0068 to H'006B
H'006C to H'006F
H'0070 to H'0073
H'0074 to H'0077
H'0078 to H'007B
H'007C to H'007F
IPR
Priority
High
IPRA7
IPRA6
IPRA5
IPRA4
IPRA3
IPRA2
IPRA1
Low

Advertisement

Table of Contents
loading

Table of Contents