Hitachi H8/3048 Hardware Manual page 776

Single-chip microcomputer
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TFCR—Timer Function Control Register
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Bit
Initial value
Read/Write
Combination mode 1 and 0
Bit 5
Bit 4
CMD1 CMD0
0
1
7
6
5
CMD1
1
1
0
R/W
Buffer mode B4
0 GRB4 operates normally
1 GRB4 is buffered by BRB4
Operating Mode of Channels 3 and 4
0
Channels 3 and 4 operate normally
1
0
Channels 3 and 4 operate together in complementary PWM mode
1
Channels 3 and 4 operate together in reset-synchronized PWM mode
H'63
4
3
2
CMD0
BFB4
BFA4
0
0
0
R/W
R/W
R/W
Buffer mode A3
0 GRA3 operates normally
1 GRA3 is buffered by BRA3
Buffer mode B3
0 GRB3 operates normally
1 GRB3 is buffered by BRB3
Buffer mode A4
0 GRA4 operates normally
1 GRA4 is buffered by BRA4
769
ITU (all channels)
1
0
BFB3
BFA3
0
0
R/W
R/W

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