Hitachi H8/3048 Hardware Manual page 103

Single-chip microcomputer
Table of Contents

Advertisement

Interrupt Priority Register B (IPRB): IPRB is an 8-bit readable/writable register in which
interrupt priority levels can be set.
www.DataSheet4U.com
Bit
IPRB7
Initial value
Read/Write
IPRB is initialized to H'00 by a reset and in hardware standby mode.
7
6
5
IPRB6
IPRB5
0
0
0
R/W
R/W
R/W
Priority level B5
Selects the priority level of DMAC
interrupt requests (channels 0 and 1)
Priority level B6
Selects the priority level of ITU channel 4 interrupt requests
Priority level B7
Selects the priority level of ITU channel 3 interrupt requests
4
3
2
IPRB3
IPRB2
0
0
0
R/W
R/W
R/W
Priority level B2
Selects the priority level of
SCI channel 1 interrupt requests
Priority level B3
Selects the priority level of SCI
channel 0 interrupt requests
Reserved bit
89
1
0
IPRB1
0
0
R/W
R/W
Reserved bit
Priority level B1
Selects the priority level
of A/D converter
interrupt request

Advertisement

Table of Contents
loading

Table of Contents