Table of Contents
Advertisement
Contention between RTCNT Write and Increment: If an increment pulse occurs in the T
of an RTCNT write cycle, writing takes priority and RTCNT is not incremented. See figure 7-21.
www.DataSheet4U.com
ø
Address bus
Internal
write signal
RTCNT
input clock
RTCNT
Figure 7-21 Contention between RTCNT Write and Increment
RTCNT write cycle by CPU
T
T
T
1
2
RTCNT address
N
Counter write data
179
3
M
state
3
Advertisement
Table of Contents
