Hitachi H8/3048 Hardware Manual page 173

Address Multiplexing: Address multiplexing depends on the setting of the M9/M8 bit in
RFSHCR, as described in table 7-5. Figure 7-4 shows the address output timing. Address output is
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multiplexed only in area 3.
Table 7-5 Address Multiplexing
Address Pins
Address signals during row
address output
Address signals during
column address output
ø
A to A , A
23
Address
bus
A to A
8
ø
A to A , A
23
Address
bus
A to A
9
Figure 7-4 Multiplexed Address Output (Example without Wait States)
A to A
23
A to A
23
M9/M8 = 0 A to A
23
M9/M8 = 1 A to A
23
T
1
9 0
A to A
8
1
Row address
a. M9/
T
1
10 0
A to A
9
1
Row address
b. M9/
A A A A
10 9 8 7 6
A A A A
10 9 8 7 6
A A A A
10 9 9 16 15
A A A A
10 18 17 16 15
T
2
A to A , A
23 9 0
A
1 16
Column address
M8
= 0
T
2
A to A , A
23 10 0
A
1 18
Column address
M8
= 1
159
A A A A A
5 4 3 2 1
A A A A A
5 4 3 2 1
A A A A A
14 13 12 11 10
A A A A A
14 13 12 11 10
T
3
to A
9
T
3
to A
10
A
0
A
0
A
0
A
0