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BRCR—Bus Release Control Register
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Bit
Modes
Initial value
1, 2,
Read/Write
5, 7
Initial value
Modes
3, 4, 6
Read/Write
ISCR—IRQ Sense Control Register
Bit
7
—
Initial value
0
Read/Write
R/W
IER—IRQ Enable Register
Bit
7
—
Initial value
0
Read/Write
R/(W)
7
6
5
A23E
A22E
A21E
1
1
1
—
—
—
1
1
1
R/W
R/W
R/W
Bus release enable
0 The bus cannot be released to an external device
1 The bus can be released to an external device
Address 23 to 21 enable
0 Address output
1 Other input/output
6
5
—
IRQ5SC
0
0
R/W
R/W
IRQ to IRQ sense control
5
0
0 Interrupts are requested when IRQ to IRQ inputs are low
1 Interrupts are requested by falling-edge input at IRQ to IRQ
6
5
—
IRQ5E
0
0
R/(W)
R/(W)
IRQ to IRQ enable
0 IRQ to IRQ interrupts are disabled
1 IRQ to IRQ interrupts are enabled
H'F3
4
3
—
—
1
1
—
—
1
1
—
—
H'F4
4
3
2
IRQ4SC
IRQ3SC
IRQ2SC
0
0
0
R/W
R/W
R/W
5
H'F5
4
3
2
IRQ4E
IRQ3E
IRQ2E
0
0
0
R/(W)
R/(W)
R/(W)
5
0
5
0
5
0
821
Bus controller
2
1
0
—
—
BRLE
1
1
0
—
—
R/W
1
1
0
—
—
R/W
Interrupt controller
1
0
IRQ1SC
IRQ0SC
0
0
R/W
R/W
0
5
0
Interrupt controller
1
0
IRQ1E
IRQ0E
0
0
R/(W)
R/(W)
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