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Execute erase-verify
;
EVR:
MOV.W
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SUB.W
;
#RAMSTR is starting destination address to which program is transferred in RAM
MOV.L
ADD.L
SUB.L
MOV.B
MOV.B
MOV.W
LOOPEV: DEC.W
BPL
EBRTST: CMP.B
BEQ
CMP.B
BCC
BTST
BNE
BRA
BC1:
BTST
BNE
ADD01:
INC.B
MOV.L
BRA
ERSEVF: MOV.L
MOV.L
EVR2:
MOV.B
MOV.B
MOV.W
LOOPDW: DEC.W
BPL
MOV.B
CMP.B
BNE
CMP.L
BNE
CMP.B
BCC
BCLR
BRA
BC2:
BCLR
ADD02:
INC.B
BRA
R6,
R0
R1,
R1
#RAMSTR:32, ER2
#ERVADR:32, ER2
#START:32,
ER2
#48,
R5H
R5H,
@FLMCR:8 ;
#e ,
R5
#1,
R5
LOOPEV
#10,
R1L
HANTEI
#08,
R1L
BC1
R1L,
R0H
ERSEVF
ADD01
R1L,
R0L
ERSEVF
R1L
@ER2+,
ER3
EBRTST
@ER2+,
ER3
@ER2,
ER4
#FF,
R5H
R5H,
@ER3
#h ,
R5
#1,
R5
LOOPDW
@ER3+,
R5L
#FF,
R5L
ADD02
ER4,
ER3
EVR2
#08,
R1L
BC2
R1L,
R0H
ADD02
R1L,
R0L
R1L
EBRTST
604
;
R0: EBR1/EBR2
R1: used to test R1-th bit in R0
;
Starting transfer destination address (RAM)
;
#RAMSTR + #ERVADR → ER2
;
ER2: address of data area used in RAM
;
;
Set EV bit
R5: set erase-verify loop counter
;
;
Program
;
Wait
;
R1L = #10?
If finished checking all R0 bits, branch to HANTEI
;
;
;
Test R1-th bit in R0H (EBR1)
;
;
;
;
Test R1-th bit in R0L (EBR2)
;
If R1-th bit in R0 is 1, branch to ERSEVF
R1L + 1 → R1L
;
Dummy-increment R2
;
;
ER3: top address of block to be erase-verified
;
;
ER4: top address of next block
;
;
Dummy write
;
R5: erase-verify loop counter
;
Wait
;
;
Read
;
Read data = #FF?
If read data ≠ #FF, branch to ADD02
;
;
Last address in block?
If not last address in block, branch to EVR2
;
;
;
;
Clear R1L-th bit in R0H (EBR1)
;
;
Clear R1L-th bit in R0L (EBR2)
R1L + 1 → R1L
;
;
Erase-verify next erased block
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