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ø
2.7 to
5.5 V
V
CC
12±0.6 V
0 to
Vcc V
V
PP
12±0.6 V
0 to
MD2
Vcc V
to 0
min 0µs
RES
V
E bit
PP
Period during which flash memory access is prohibited
Period during which flash memory can be rewritten
(Execution of program in flash memory prohibited, and data reads other than verify operations prohibited)
Notes
1
When entering boot mode or making a transition from boot mode to another mode, mode switching must be carried
out by means of RES input. The pin output states change during this switchover interval (the interval during which
the RES pin is low), and therefore these pins should not be used as output signals during this time.
2
When making a transition from boot mode to another mode, the flash memory read setup time t
mode programming setup time t
(Example: Boot Mode
t
VPS
Programming/
erasing
possible
t
FRS
tosc1
min 0 µs
min 10 ø
t
MDS
VppE
V
ppE
cleared
t
*
set
FRS
Mode
Boot mode
Mode
switch-
switch-
ing*
1
ing*
must be satisfied with respect to RES clearance timing.
MDS
Figure 18-30 Mode Transition Timing
→ User Mode ↔ User Program Mode)
t
t
VPS
VPS
Programming/
erasing
possible
t
FRS
2
t
*
MDS
Clear
VppE
2
User
User program mode
mode
1
627
t
VPS
Programming/
Programming/
erasing
erasing
possible
possible
t
FRS
User
User program
mode
mode
and
FRS
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