Hitachi H8/3048 Hardware Manual page 692

Table 21-12 Bus Timing (cont)
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Condition A: V = 2.7 V to 5.5 V, AV
CC
V = AV
SS
specifications), T
Condition C: V = 5.0 V ± 10%, AV
CC
V = AV
SS
specifications), T
Item
Write data delay time
Write data setup time 1
Write data setup time 2
Write data hold time
Read data access time 1
Read data access time 2
Read data access time 3
Read data access time 4
Precharge time
Wait setup time
Wait hold time
Bus request setup time
Bus acknowledge delay time 1
Bus acknowledge delay time 2
Bus-floating time
Note: At 8 MHz, the times below depend as indicated on the clock cycle time.
= 1.5 × t
t
ACC1 CYC
= 2.5 × t
t
ACC2 CYC
= 1.0 × t
t
ACC3 CYC
= 2.0 × t
t
ACC4 CYC
At 16 MHz, the times below depend as indicated on the clock cycle time.
= 1.5 × t
t
ACC1 CYC
= 2.5 × t
t
ACC2 CYC
= 1.0 × t
t
ACC3 CYC
= 2.0 × t
t
ACC4 CYC
= 2.7 V to 5.5 V, V
CC
= 0 V, ø = 1 MHz to 8 MHz, T
SS
= –40°C to +85°C (wide-range specifications)
a
= 5.0 V ± 10%, V
CC
= 0 V, ø = 1 MHz to 16 MHz, T
SS
= –40°C to +85°C (wide-range specifications)
a
Condition A
8 MHz
Symbol Min
t —
WDD
t 60
WDS1
t 5
WDS2
t 25
WDH
t —
*
ACC1
t —
*
ACC2
t —
*
ACC3
t —
*
ACC4
t 85
*
PCH
t 40
WTS
t 10
WTH
t 40
BRQS
t —
BACD1
t —
BACD2
t —
BZD
– 68 (ns) t
WSW1
– 73 (ns) t
WSW2
= 1.0 × t
– 55 (ns) t
PCH
– 70 (ns)
– 34 (ns) t
WSW1
– 37 (ns) t
WSW2
= 1.0 × t
– 33 (ns) t
PCH
– 30 (ns)
684
= 2.7 V to AV
REF
= –20°C to +75°C (regular
a
= 4.5 V to AV
REF
= –20°C to +75°C (regular
a
Condition C
16 MHz
Max Min Max
75 — 60
— 15 —
— –5 —
— 20 —
120 — 60
240 — 120
70 — 30
180 — 95
— 45 —
— 25 —
— 5 —
— 40 —
60 — 30
60 — 30
70 — 40
= 1.0 × t
– 40 (ns)
CYC
= 1.5 × t
– 38 (ns)
CYC
– 40 (ns)
CYC
= 1.0 × t
– 28 (ns)
CYC
= 1.5 × t
– 29 (ns)
CYC
– 28 (ns)
CYC
,
CC
,
CC
Test
Unit Conditions
ns Figure 21-7
Figure 21-8
ns Figure 21-9
ns Figure 21-21