Hitachi H8/3048 Hardware Manual page 793

Single-chip microcomputer
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BRB4 H/L—Buffer Register B4 H/L
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Bit
15
14
1
1
Initial value
Read/Write
R/W
R/W
Note: Bit functions are the same as for ITU3.
TPMR—TPC Output Mode Register
Bit
7
Initial value
1
Read/Write
Group 0 non-overlap
0 Normal TPC output in group 0
Output values change at compare match A in the selected ITU channel
1 Non-overlapping TPC output in group 0, controlled by compare match
A and B in the selected ITU channel
Group 1 non-overlap
0 Normal TPC output in group 1
Output values change at compare match A in the selected ITU channel
1 Non-overlapping TPC output in group 1, controlled by compare match
A and B in the selected ITU channel
Group 2 non-overlap
0 Normal TPC output in group 2
Output values change at compare match A in the selected ITU channel
1 Non-overlapping TPC output in group 2, controlled by compare match
A and B in the selected ITU channel
Group 3 non-overlap
0 Normal TPC output in group 3
Output values change at compare match A in the selected ITU channel
1 Non-overlapping TPC output in group 3, controlled by compare match
A and B in the selected ITU channel
13
12
11
10
9
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
6
5
1
1
786
H'9E, H'9F
8
7
6
5
4
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
H'A0
4
3
2
G3NOV
G2NOV
1
0
0
R/W
R/W
ITU4
3
2
1
0
1
1
1
1
R/W
R/W
R/W
R/W
TPC
1
0
G1NOV
G0NOV
0
0
R/W
R/W

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