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12.1.4 Register Configuration
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Table 12-2 summarizes the WDT registers.
Table 12-2 WDT Registers
*1
Address
*2
Write
Read
H'FFA8
H'FFA8
H'FFA9
H'FFAA H'FFAB Reset control/status register
Notes: 1. Lower 16 bits of the address.
2. Write word data starting at this address.
3. Only 0 can be written in bit 7, to clear the flag.
Name
Timer control/status register
Timer counter
Abbreviation
TCSR
TCNT
RSTCSR
423
R/W
Initial Value
*3
R/(W)
H'18
R/W
H'00
*3
R/(W)
H'3F
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