Hitachi H8/3048 Hardware Manual page 739

Table A-4 Number of Cycles per Instruction (cont)
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Instruction Mnemonic
DEC DEC.B Rd
DEC.W #1/2, Rd
DEC.L #1/2, ERd
DIVXS DIVXS.B Rs, Rd
DIVXS.W Rs, ERd
DIVXU DIVXU.B Rs, Rd
DIVXU.W Rs, ERd
EEPMOV EEPMOV.B
EEPMOV.W
EXTS EXTS.W Rd
EXTS.L ERd
EXTU EXTU.W Rd
EXTU.L ERd
INC INC.B Rd
INC.W #1/2, Rd
INC.L #1/2, ERd
JMP JMP @ERn
JMP @aa:24
JMP @@aa:8 Normal
JSR JSR @ERn
JSR @aa:24 Normal
JSR @@aa:8 Normal
LDC LDC #xx:8, CCR
LDC Rs, CCR
LDC @ERs, CCR
LDC @(d:16, ERs), CCR 3
LDC @(d:24, ERs), CCR 5
LDC @ERs+, CCR
LDC @aa:16, CCR
LDC @aa:24, CCR
Notes: 1. Not available in the H8/3048 Series.
2. n is the value set in register R4L or R4. The source and destination are accessed n + 1 times each.
Instruction Branch
Fetch Addr. Read Operation Access
I J
1
1
1
2
2
1
1
2
2
1
1
1
1
1
1
1
2
2
*1 2 1
Advanced 2 2
Normal *1 2
Advanced 2
*1
2
Advanced 2
*1 2 1
Advanced 2 2
1
1
2
2
3
4
732
Stack Byte Data Word Data Internal
Access
K L M
*2
2n + 2
2n + 2 *2
1
2
1
2
1
2
1
1
1
1
1
1
Operation
N
12
20
12
20
2
2
2
2
2
2