Hitachi H8/3048 Hardware Manual page 385

Figure 10-53 shows an example in which GRB3 is buffered by BRB3 in complementary PWM
mode. Buffering is used to set GRB3 to a higher value than GRA3, generating a PWM waveform
www.DataSheet4U.com
with 0% duty cycle. The BRB3 value is transferred to GRB3 when TCNT3 matches GRA3, and
when TCNT4 underflows.
TCNT3 and
TCNT4 values
H'1FFF
GRA3
H'0999
H'0000
BRB3 H'0999
GRB3 H'0999
TIOCA
3
TIOCB
3
Figure 10-53 Register Buffering (Example 3: Buffering in Complementary PWM Mode)
TCNT3
TCNT4
H'1FFF
H'0999 H'1FFF
373
GRB3
H'0999
H'1FFF H'0999
Time