Hitachi H8/3048 Hardware Manual page 470

Single-chip microcomputer
Table of Contents

Advertisement

Table 13-4 Examples of Bit Rates and BRR Settings in Synchronous Mode
www.DataSheet4U.com
2
Bit Rate
n
N
(bits/s)
110
3
70
250
2
124
500
1
249
1 k
1
124
2.5 k
0
199
5 k
0
99
10 k
0
49
25 k
0
19
50 k
0
9
100 k
0
4
250 k
0
1
500 k
0
0*
1 M
2 M
2.5 M
4 M
Note: Settings with an error of 1% or less are recommended.
Legend
Blank: No setting available
—:
Setting possible, but error occurs
*:
Continuous transmit/receive not possible
The BRR setting is calculated as follows:
Asynchronous mode:
ø
N =
64 × 2
× B
2n–1
Synchronous mode:
ø
N =
8 × 2
× B
2n–1
B: Bit rate (bits/s)
N: BRR setting for baud rate generator (0 ≤ N ≤ 255)
ø: System clock frequency (MHz)
n: Baud rate generator clock source (n = 0, 1, 2, 3)
(For the clock sources and values of n, see the following table.)
4
8
n
N
n
N
2
249
3
124
2
124
2
249
1
249
2
124
1
99
1
199
0
199
1
99
0
99
0
199
0
39
0
79
0
19
0
39
0
9
0
19
0
3
0
7
0
1
0
3
0
0*
0
1
0
0*
× 10
6
– 1
× 10
6
– 1
ø (MHz)
10
13
n
N
n
N
3
202
3
101
2
202
1
249
2
80
1
124
1
162
0
249
1
80
0
99
0
129
0
49
0
64
0
24
0
9
0
12
0
4
0
0*
459
16
18
n
N
n
N
3
249
3
124
3
140
2
249
3
69
2
99
2
112
1
199
1
224
1
99
1
112
0
159
0
179
0
79
0
89
0
39
0
44
0
15
0
17
0
7
0
8
0
3
0
4
0
1
0
0*

Advertisement

Table of Contents
loading

Table of Contents