Hitachi H8/3048 Hardware Manual page 742

Table A-4 Number of Cycles per Instruction (cont)
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Instruction Mnemonic
RTS RTS
SHAL SHAL.B Rd
SHAL.W Rd
SHAL.L ERd
SHAR SHAR.B Rd
SHAR.W Rd
SHAR.L ERd
SHLL SHLL.B Rd
SHLL.W Rd
SHLL.L ERd
SHLR SHLR.B Rd
SHLR.W Rd
SHLR.L ERd
SLEEP SLEEP
STC STC CCR, Rd
STC CCR, @ERd
STC CCR, @(d:16, ERd) 3
STC CCR, @(d:24, ERd) 5
STC CCR, @–ERd
STC CCR, @aa:16
STC CCR, @aa:24
SUB SUB.B Rs, Rd
SUB.W #xx:16, Rd
SUB.W Rs, Rd
SUB.L #xx:32, ERd
SUB.L ERs, ERd
SUBS SUBS #1/2/4, ERd
SUBX SUBX #xx:8, Rd
SUBX Rs, Rd
TRAPA TRAPA #x:2 Normal*
XOR XOR.B #xx:8, Rd
XOR.B Rs, Rd
XOR.W #xx:16, Rd
XOR.W Rs, Rd
XOR.L #xx:32, ERd
XOR.L ERs, ERd
XORC XORC #xx:8, CCR
Note: * Not available in the H8/3048 Series.
Instruction Branch
Fetch Addr. Read Operation Access
I J
Normal* 2
Advanced 2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
3
4
1
2
1
3
1
1
1
1
2 1
Advanced 2 2
1
1
2
1
3
2
1
735
Stack Byte Data Word Data Internal
Access
K L M
1
2
1
1
1
1
1
1
2
2
Operation
N
2
2
2
4
4