Hitachi H8/3048 Hardware Manual page 224

Single-chip microcomputer
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Table 8-7 Register Functions in Idle Mode
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Register
23
MAR
23
7
All 1s
IOAR
15
Decremented
ETCR
Legend
MAR:
Memory address register
IOAR: I/O address register
ETCR: Execute transfer count register
MAR and IOAR specify the source and destination addresses. MAR specifies a 24-bit source or
destination address. IOAR specifies the lower 8 bits of a fixed address. The upper 16 bits are all
1s. MAR and IOAR are not incremented or decremented.
Figure 8-4 illustrates how idle mode operates.
MAR
Function
Activated by
SCI 0 Receive-
Data-Full
Other
Interrupt
Activation
Destination
Source
0
address
address
register
register
Source
Destination
0
address
address
register
register
0
Transfer counter
Transfer
1 byte or word is
transferred per request
Figure 8-4 Operation in Idle Mode
210
Initial Setting
Operation
Destination or
Held fixed
source address
Source or
Held fixed
destination
address
Number of
transfers
once per
transfer until
H'0000 is
reached and
transfer ends
IOAR

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